The System Management Bus (SMBus) (as described, for example, in the System Management Bus (SMBus) Specification of the SBS Implementers Forum, version 2.0, published Aug. 3, 2000), derived from the Inter-Integrated Circuit (I2C) bus, was developed by Intel Corporation to allow integrated circuits to communicate directly with each other via a simple bi-directional 2-wire bus. Peripheral devices, such as Peripheral Component Interconnect express (PCIe) devices (as described, for example, in The PCI Express Base Specification of the PCI Special Interest Group, Revision 3.0 published Nov. 18, 2010), may utilize the SMBus serial communication protocol for low bandwidth communication, such as power management, device status, clock data, etc.
FIG. 1 is an illustration of a plurality of peripheral devices coupled to a host system via an SMBus according to the prior art. Peripheral devices (i.e., slave devices) 102, 104 and 106 utilize SMBus 108 for low bandwidth communication. In some prior art solutions, more than one of said slave devices will have the same SMBus/I2C addresses, as there is no central authority to determine what SMBus/I2C slave addresses any device should have; thus, their address are predetermined by their respective vendors and multiple cards may be pre-configured with the same address. For these solutions, the host system includes slave device connectivity manager 110 to multiplex cards with the same SMBus/I2C addresses to prevent address conflicts. In other prior art solutions, slave device connectivity manager 110 includes an SMBus Address Resolution Protocol (ARP) central authority to assign and mange SMBus/I2C addresses for each of said devices 102, 104 and 106.
Said prior art slave device connectivity management solutions are undesirable, due to the added device component and manufacturing costs. What is needed is a solution included in a peripheral device that eliminates slave device connectivity conflicts regardless of SMBus configuration or the configuration of other peripheral devices.
Descriptions of certain details and implementations follow, including a description of the figures, which may depict some or all of the embodiments described below, as well as discussing other potential embodiments or implementations of the inventive concepts presented herein. An overview of embodiments of the invention is provided below, followed by a more detailed description with reference to the drawings.